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The Quantum Leap: Equal1 Leverages Cadence Tools for QSoC Design

In today's fast-paced world, the rise of artificial intelligence (AI) is driving skyrocketing expectations for high-performance computing (HPC). To address the expectations, we must overcome complex...

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Digital Design Highlights - New Training Releases, Blogs, Videos and Digital...

 With another year gone, we look back at our most popular blogs from the year and provide a summary of everything else that occurred in the education sector.In 2024, we published 28more training blogs...

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Need to Reconfigure Your SoC to Meet Functional Safety Standards?

The ISO 26262 standard provides functional safety guidance for semiconductors used in the automotive industry based on the foundational IEC 61508 standard. The Cadence Midas Safety Platform exchanges...

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Addressing Sequential Elements Optimization in the VLSI Chip Design

With highly advanced technology, the real designs are getting complex, making the design optimization process complicated and comprising the design results. The sequential cells play a vital role in...

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Static Timing Analysis: Cell Delay vs Cell Drive Strength!

Have you ever wondered how a predator succeeds (or) a prey escapes in the jungle? It’s the breathtaking speed and agility of the predator (say, a leopard) 🐆 as it chases prey (say, a deer)🦌.The VLSI...

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Conformal AI Studio: Accelerated LEC/ECO/LP with AI/ML-Driven Enhancements

If you're a chip designer or verification engineer, you have likely spent countless hours stressing over whether your design block is functionally accurate; in other words, "Will my chip actually do...

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The Power of Less is More! Minimize Power, Maximize Chip's Efficiency!

Optimizing power can be a very convoluted and crucial process. To make design chips meet throughput goals and optimal power consumption, you need to plan right from the beginning! Power is HOT and...

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Spaghetti Is Great! Spaghetti Code? Not So Much

Have you ever found yourself in an Italian restaurant, twirling your fork around a plate of delicious spaghetti? Good spaghetti is a true gift, but spaghetti code? Not so much.Spaghetti code refers to...

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Silicon Skylines: Crafting the Future of Electronics

The world of Electronic Design Automation (EDA) is fascinating, where we transform humble grains of sand into sophisticated silicon chips that power our modern lives. Imagine this journey as a grand...

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Microlearning: The Snackable Knowledge Training Videos

Are you looking to level up your digital design skills—one byte at a time? Ohoo! I am supposed to ask this question at the end of this blog.Ever feel like your brain is a sponge that’s just not soaking...

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Semiconductors: Pioneering Extraordinary Growth in the 20th Century

Semiconductors have revolutionized the world, powering everything from smartphones to space shuttles. But how did this incredible journey begin, and where is it headed? Welcome to Semiconductor 101...

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Transforming Chip Design with Cadence Cerebrus AI Studio

Cadence is transforming chip design with the launch of Cadence Cerebrus® AI Studio, the industry's first agentic AI, multi-block, multi-user design platform. This cutting-edge solution accelerates...

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Elevate Your EDA Skills: Achieve Unmatched PPA with Genus Synthesis Solution

As the electronic design automation (EDA) landscape continues to evolve, the importance of efficient and effective synthesis has grown exponentially. With the increasing complexity of modern...

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From Chaos to Clarity: Mastering PBS MiM Flow Without the Land Disputes

Let's face it—when most of us hear "partition," we think of land disputes, family feuds, or that one cousin who insists on measuring every square inch of their share.However, in the world of chip...

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Accelerate Your Design Signoff with Cadence Voltus Training Kit

By Shaleen Bhabu, AE Director ASK and Ronen Stilkol, AE Architect In the rapidly evolving world of semiconductor design, signoff challenges are growing due to increasing complexity, shrinking...

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