In today's tutorial, I'm giving you a sample EPS (Encounter Power System) script that you can use to generate power-grid views for your standard cells. Power-grid views are used during rail analysis, with IR-Drop and EM (electromigration/current density) being the two most popular analysis types.
First, the LEF information is read in. The technology LEF needs to be read in first, then the LEF files of your standard cell libraries:
read_lib -lef tech.lef \
stdcell_hvt.lef \
stdcell_lvt.lef
Next, we tell EPS what kind of views we want to create. We're creating accurate standard cell views using the LEF models. We also need to point to the QRC extraction tech file, list all of our power/ground names (you may or may not have bulk pwr/gnd - you can leave that out if not), and include a layer mapping file.
set_power_library_mode \
-accuracy accurate \
-celltype stdcells \
-extraction_tech_file tt_qrcTechFile \
-lef_layermap lef_layer.map \
-generic_power_names {VDD 0.90 VDD_SW 0.90 VDDG 0.90} \
-generic_ground_names {VSS} \
-generic_bulk_power_names {VNW 0.90} \
-generic_bulk_ground_names {VPW} \
-default_power_voltage 0.90 \
-input_type pr_lef
Below is an example of the lef_layer.map file. The second column is what the metal and via layers are called in the QRC extraction tech file, and the fourth column is what the metal and via layers are called in the technology LEF. (The QRC techfile is not an ASCII file, but you can find the names in the .ict text file that usually comes with the QRC techfile.) In this example, the names happened to be the same between the QRC tech file and the technology LEF, but many times the layer/via names differ, especially for the upper layers.
metal M1 lefdef M1
metal M2 lefdef M2
metal M3 lefdef M3
metal M4 lefdef M4
metal M5 lefdef M5
metal M6 lefdef M6
metal M7 lefdef M7
metal M8 lefdef M8
metal AP lefdef AP
via VIA1 lefdef VIA1
via VIA2 lefdef VIA2
via VIA3 lefdef VIA3
via VIA4 lefdef VIA4
via VIA5 lefdef VIA5
via VIA6 lefdef VIA6
via VIA7 lefdef VIA7
via RV lefdef RV
Finally, we can issue the characterize_power_library command which is what creates the power-grid views. The filler cells and decap cells are specified, as well as any powergate cells. (If you're not working on a power-shutoff design, you can leave out the detailed_powergate option.) We also provide the SPICE model file from the foundry, the SPICE subckt cells for our standard cells, and list the SPICE sections that contain the devices in our standard cells. (That part involves some trial and error - the first time you run the script, you may get errors for devices that are undefined. Search for those devices in the spice model file, then include the section they are found in, such as "ttg_hvt".) You'll notice we reference a "stdcell.list" file - this is a simple text file with one std cell name per line.
characterize_power_library \
-celllist_file stdcell.list \
-library_name accurate_std.tt_0p90v \
-filler_cells { FILL* }
-decap_cells { DCAP* }
-detailed_powergate { \
{HEADBUFx16 VDDG VDD} \
{HEADBUFx32 VDDG VDD} \
} \
-spice_models cln28hpm_1d8_elk_v1d0_2p1.l \
-spice_corners {ttg ttg_lvt ttg_hvt TT TT_hvt TT_lvt Total Total_lvt Total_hvt} \
-spice_subckts { \
stdcell_hvt_typical_25c.spice \
stdcell_lvt_typical_25c.spice \
}
To run the script (let's call it create_stdcell_pgv.tt.tcl), just start EPS and type:
source create_stdcell_pgv.tt.tcl
The resulting power-grid library from this sample script can be used for power and rail analysis in the tt_0p90v corner. You'll need to create a power-grid view library for each process/voltage you want to run power analysis in. So if you need to run IR-drop in the ss_0p81v corner, for example, make a copy of the script and edit it to refer to ss SPICE models, the ss qrcTechFile, and change all the voltages to 0.81.
Once the script completes successfully, check the .report file that was generated to make sure that your cells report PASS. If you're using powergate cells, make sure they were recognized as such.
I hope this has provided a quick-start to getting your standard cell power-grid views created!
- Kari Summers
Here's the whole script at once, so you can just cut and paste into a file, and start editing for your specific design.
read_lib -lef tech.lef \
stdcell_hvt.lef \
stdcell_lvt.lef
set_power_library_mode \
-accuracy accurate \
-celltype stdcells \
-extraction_tech_file tt_qrcTechFile \
-lef_layermap lef_layer.map \
-generic_power_names {VDD 0.90 VDD_SW 0.90 VDDG 0.90} \
-generic_ground_names {VSS} \
-generic_bulk_power_names {VNW 0.90} \
-generic_bulk_ground_names {VPW} \
-default_power_voltage 0.90 \
-input_type pr_lef
characterize_power_library \
-celllist_file stdcell.list \
-library_name accurate_std.tt_0p90v \
-filler_cells { FILL* }
-decap_cells { DCAP* }
-detailed_powergate { \
{HEADBUFx16 VDDG VDD} \
{HEADBUFx32 VDDG VDD} \
} \
-spice_models cln28hpm_1d8_elk_v1d0_2p1.l \
-spice_corners {ttg ttg_lvt ttg_hvt TT TT_hvt TT_lvt Total Total_lvt Total_hvt} \
-spice_subckts { \
stdcell_hvt_typical_25c.spice \
stdcell_lvt_typical_25c.spice \
}
exit