Are you struggling to run the RTL2GDSII labs? Want to speed up your learning time? No worries, watch the lab demos created for each module of the flow by clicking the
play button. 
At the end of the Cadence_RTL-to-GDSII_Flow 4_0 online course is a lab manual that instructs and tests topics first introduced in the lecture.
Lab instructions are also available in video format to speed up the learning time. These demo videos will help you to perform each step quickly for the complete course and improve the learner's confidence in using all the tools.
The Cadence_RTL-to-GDSII_Flow 4_0 course was released a few months ago. Now you can also access the lab demos created for each module of the course through a channel video. Each video takes approximately three minutes to view.
After watching the RTL-to-GDSII lab demos, you will be able to:
- Code a design in Verilog as per the design specification provided.
- Compile, elaborate, and simulate your design.
- Synthesize your design.
- Run a design for test flow.
- Run equivalency checking at different stages of the flow.
- Floorplan a design.
- Run placement, optimization, clock tree synthesis, and routing on your design.
- Run signoff checks to ensure that you can fabricate a chip.
- Write out a GDSII file.
Want to learn more?
We can also organize this Cadence RTL-to- GDSII Flow training for you as a"Blended" or"live" training. Please reach out to Cadence Training for further information.
Register for the Online Training with the following steps:
- Log on to cadence.com with your registered Cadence ID and password.
- Select Learning from the menu > Online Courses.
- Search for Cadence_RTL-to-GDSII_Flow 4_0 using the search bar.
- Select the course and click the Enroll button.
Also, don't forget to obtain your Digital Badge after finishing the training.
Related Resources
Online courses
Cadence RTL-to-GDSII Flow v4.0 (Online)
Genus Synthesis Solution with Stylus Common UI v22.1 (Online)
Test Synthesis with Genus Stylus Common UI vGenus21.1 (Online)
Innovus Block Implementation with Stylus Common UI v22.1 (Online)
Conformal Equivalence Checking v22.1 (Online)
Blogs
Training Insights - What Is IR drop? Is it Possible to Run IR-drop Analysis Using Innovus?
Training Insights - Dude, Where's My Software?
RTL-to-GDSII Flow: I Am Not a Tool but Can Help You Implement Your Entire Design!
Relax in Summer with Cooler IC chips and Ice-Cream! Do you want to Explore the Recipe?
Training Insights – Design Robustness Analysis Application: Aging-Aware STA
Training Bytes
How to Run Power Analysis and Analyze the Results in Innovus
How to Route a Design and Perform RC Extraction and Timing Analysis in Innovus
Power Planning and Power Routing
Creating Power Rings, Power Stripes, and Power Rails in Innovus Implementaion System
Innovus LP21_1 Power Analysis Demo
Signoff Considerations for Low-Power Designs
Implementing Low-Power Using Innovus Technology
For more information on Cadence's digital design and signoff products and services, visit www.cadence.com.
Happy learning! Thank You.