Each year, we survey the industry to get an idea of the industry’s experiences and expectations of high-level synthesis (HLS). As in last year’s survey, approximately half of the responses were from current HLS users, and half were from non-users. This year’s anonymous survey focused on productivity.
| Spoiler alert: Users find the HLS flow to be over 2.5x more productive for design and nearly 4x more productive for verification compared to designing and verifying RTL by hand, similar but slightly higher than in our 2017 HLS productivity survey. | https://youtu.be/DYpxcE7rBw8 |
So let's get on with the survey,,,
This was a good cross-section of HLS users and non-users, which I was very happy to see. The total number of responses is high enough that this survey is likely a decent representation of the industry.
The survey for non-users focused on their expectations of HLS. The results were remarkably in line with the 2017 survey results, so here I’ll focus on the responses of HLS users.
The first question for HLS users…
HLS users report very good productivity gains, averaging 2.7x more productive than hand-writing RTL (using the midpoint of each category). In fact, nearly half of all respondents reported at least a 2x improvement in productivity.
Interestingly, this is the one question where there was a significant difference based on geography. North American users reported the greatest productivity gain, averaging 3.7x ; on the other end of the spectrum, Japan reported only 2.1x productivity gain. (“Only”… I wish I could get to work 2.1x faster!) That is a big enough difference to give me some homework to look into over the holiday and into Q1… | https://youtu.be/iw0Jr5CJLpA |
The next question was about verification and the HLS flow…
In a substantial improvement since 2017, almost 50% (okay, 47%) of respondents said that verification productivity is at least 2x better, with nearly 1 in 5 reporting over 10x improvement in productivity. On average, it comes out to a 3.9x verification improvement.
So, in general, companies using HLS get even more productivity benefit in verification than design. This is good, because we all know verification is the bottleneck in today’s complex SoC’s.
And finally…
With nearly identical results to our 2017 survey, reuse and retargeting of SystemC IP is also providing good benefit. That being said, I have to admit these results are not in line with what I hear anecdotally from our user base. This is an industry survey, not just Stratus users, but still this seems low.
I hear that 5x, 10x, or more productivity improvement (e.g., months to days) seems commonplace from the Stratus users who have adopted an HLS and behavioral IP flow. Retargeting for different technologies, PPA targets (power, performance, area), and even algorithmic changes are a cinch with behavioral IP.
This gives me some more homework to dig into... Stay tuned for more details as I learn them.
So all in all, companies who have adopted HLS are realizing very good productivity benefits. Excellent!!!
Finally, congratulations to Anderson Wang of Gyrfalcon Technology, Inc. for winning the GoPro HERO! Happy holidays to Anderson and all of you! May your 2020 be filled with good cheer, good luck, good friends, and.. uh… good productivity! Cheers! | https://youtu.be/rS0VQOHX7lM |